1996 INTERNATIONAL CONFERENCE ON PARALLEL PROCESSING
August 12-16, 1996
Indian Lakes Resort, Bloomingdale, IL 60108
Hotel Phone: (708) 529-0200
Note: the ICPP 1997 WWW site is http://www.ecn.purdue.edu/Conferences/ICPP/.
This document was derived from raw text provided to H. Dietz by the ICPP 96 organizers. As such, it is subject to change without notice and may contain (hopefully minor) errors.
The outline of this document is:
ICPP 96 begins with a workshop in which each session will consist of three 20 minute invited presentations, followed by a panel discussion.
Workshop Chair: H. J. Siegel, Purdue University (ECE)
Workshop Vice-Chairs: Seth Abraham, Purdue University (ECE)
Rudolf Eigenmann, Purdue University (ECE)
Susanne Hambrusch, Purdue University (CS)
John R. Rice, Purdue University (CS)
Session Organizer: John R. Rice, Purdue University
Topic: How Can We Conduct Performance Analysis and Benchmarking of
Parallel Machines in Realistic Ways That Are Meaningful for General Users?
Speakers:
"The Super Symbol Table: Tool Writers Need Help!" Bart Miller, University
of Wisconsin
"The Next Frontier: Interactive and Closed Loop Performance Steering"
Daniel A. Reed, University of Illinois
"Issues Related to the Performance of Parallel Machines in a Production
Environment: End User Productivity" Dave Schneider, Cornell University
Session Organizer: Seth Abraham, Purdue University
Topic: For a Given Size Range of Parallel Machines - e.g., 256 to 1024
Commodity High-Performance Processors - What Interconnection Network Would
You Use to Build a General Purpose MIMD Machine and Why?
Speakers:
"Commercially Viable MPP Networks" Craig Stunkel, IBM T. J. Watson Research
Center
"Let Us Build System-Friendly Networks - Build Them Hierarchically" Pen
Yew, University of Minnesota
"Issues in Designing Truly Scalable Interconnection Networks" Lionel Ni,
Michigan State University
Parallel I/O: A Set of Intertwined Systems and Applications Issues Paul Messina, Caltech
Session Organizer: Susanne Hambrusch, Purdue University
Topic: What Model Can Be Used to Characterize Machines and Algorithms and
Their Interaction - Where Architects Strive to Support the Features of the
Model Effectively and Compiler Writers Use This Model as a Basis for Their
Language Design?
Speakers:
"Implementing the BSP Model for Parallel Computation" Thomas Cheatham,
Harvard University
"What Good Are Shared-Memory Models?" Phil Gibbons, AT&T Bell Labs
"On Combining Technology and Theory in Search of a Parallel Computation
Model" Joseph Ja'Ja', University of Maryland
Session Organizer: Rudolf Eigenmann, Purdue University
Topic: Portable (Machine-Independent) Programming Languages/Compilers for
Parallel Machines - How Can They Be Designed for Platforms With Great
Architectural Diversity in a Way That Allows Machine-Dependent Features To
Be Exploited?
Speakers:
"Portable Parallel Programming in HPC++" Dennis Gannon , Indiana University
"Fortran: A Modern Standard Programming Language for Parallel Scalable High
Performance Technical Computing" David Loveman, Digital Equipment Corp.
"Restructuring Programs for High-Speed Computers with Polaris" David Padua,
University of Illinois
Summary of Workshop on Challenges for Parallel Processing: Are the Proposed Solutions Reasonable? H. J. Siegel, Purdue University
Deep Blue - The IBM Chess Playing Parallel Processor
C. J. Tan, IBM T. J. Watson Research Center
(R) Equivalence between SP2 High Performance Switches and Three-Stage Clos
Networks S. Chalasani,
M. Bruggencate (Wisconsin-Madison)
(R) A Task-Based Dependability Model for k-ary n-cubes A. S.Yaidya, B. S.
Yoo, C. R. Das (Penn State), J. Kim (Pohang University, Korea)
(C) Decomposition of Total Exchange for Multidimensional Interconnects V.
V. Dimakopoulos, N. J. Dimopoulos (University of Victoria)
(C) Optimal Communication Algorithms for Heterogeneous Computing Over ATM
Networks X. Wang, V. P. Roychowdhury (Purdue)
(R) Mapping the Preconditioned Conjugate Gradient Algorithm for Neutron
Diffusion Applications onto Parallel Machines J. J. E. So, R. Janardhan, T.
J. Downar, H. J. Siegel (Purdue)
(R) A Three-Parameter Fast Givens QR Algorithm for Superscalar Processors
J. J. Carrig Jr., G. G. L. Meyer (Johns Hopkins)
(C) Wavelet Decomposition on High-Performance Computing Systems T.
El-Ghazawi (George Washington), J. Le Moigne (NASA-Goddard)
(C) On the Scalability of 2-D Wavelet Transform Algorithms on Fine-Grained
Parallel Machines J. N. Patel, L. H. Jamieson (Purdue), A. A. Khokhar
(Delaware)
(R) Array Operation Synthesis to Optimize HPF Programs G. H. Hwang, J. K.
Lee (Tsinghua, Taiwan)
D. C. R. Ju (Hewlett-Packard)
(R) Polynomial Time Nested Loop Fusion with Full Parallelism E. H. Sha, C.
Lang (Notre Dame),
N. L. Passos (Midwestern State)
(R) Compiler Support for Privatization on Distributed Memory Machines D. J.
Palermo, E. Su, E. W. Hodges IV, P. Banerjee (UIUC)
(R) Conflict Resolutions in the Inside-Out Routing Algorithm S. W. Seo
(Princeton), T. Y. Feng, Y. Kim (Penn State)
(R) Efficient Collective Operations with ATM Network Interface Support Y.
Huang, P. K. McKinley (Michigan State)
(R) Contention-Free Communication Scheduling on 2D Meshes A. Eberhart, J.
Li (Portland State)
(R) A Study of a Non-Linear Optimization Problem Using a Distributed
Genetic Algorithm N. Neves, A.-T. Nguyen, E. L. Torres (UIUC)
(R) A Parallel Algorithm for State Assignment of Finite State Machines G.
Hasteer, P. Banerjee (UICC)
(C) A Massively Parallel SIMD Algorithm for Combinatorial Optimization R.
A. Henry, N. S. Flann, D. W. Watson (Utah State)
(C) Implementation of a Training Set Parallel Algorithm for an Automated
Fingerprint Image Compression System H. H. Ammar, Z. Miao (West Virginia)
(R) Optimal Size and Shape of Supernode Transformations E. Hodzic (HAL
Computer), W. Shang (Santa Clara)
(R) A Compile Time Partitioning Method for DOALL Loops on Distributed
Memory Systems S. Pande (Cincinnatti)
(R) Unique Set Oriented Partitioning of Nested Loops with Non-uniform
Dependences J. Ju, V. Chaudhary (Wayne State)
(R) Adaptive Routing in Irregular Networks Using Cut-Through Switches W.
Qiao, L. M. Ni (Michigan State)
(R) A High Performance Router Architecture for Interconnection Networks J.
Duato, P. Lopez, F. Silla (Universidad Politecnica de Valencia), S.
Yalamanchili (Georgia Tech)
(R) Scalable S-to-P Broadcasting on Message-Passing MPPs S. E. Hambrusch,
A. A. Khokhar, Y. Liu (Purdue)
(R) An Efficient Algorithm for Row Minima Computations in Monotone Matrices
K. Nakano (Nagoya Institute, Japan), S. Olariu (Old Dominion)
(R) Edge Embedding of Two-Dimensional Grids in Hypercubes with Dilation Two
and Congestion Three C. C. Lin, X. Ma, S.-H. S. Huang (Houston)
(C) A Novel Parallel Algorithm for Enumerating Combinations B. B. Zhou, R.
P. Brent, X. Qu, W. F. Liang (Australian Nat.)
(R) Towards Automatic Performance Analysis A. B. Sinha (Informix), L. V.
Kale (UIUC)
(R) Estimating Parallel Execution Time of Loops with Loop-Carried
Dependences T. Nakanishi, K. Joe (Nara Institute, Japan), C. D.
Polchronopoulos, et. al. (UIUC), K. Araki (Kyushu U., Japan), A. Fukuda
(Nara Inst., Japan)
(R) Performance Analysis and Prediction of Processor Scheduling Strategies
in Multiprogrammed Shared-Memory Multiprocessors K. K. Yue, D. J. Lilja
(Minnesota)
Deep Blue - The IBM Chess Playing Parallel Processor
C. J. Tan, IBM T. J. Watson Research Center
M. Campbell, IBM T. J. Watson Research Center
A. J. Hoane, Jr., IBM T. J. Watson Research Center
Parallel Computing in the Real World
Thomas J. R. Hughes, Stanford University & Centric Engineering Systems Inc.
(R) Maximum Reconfiguration of 2-D Mesh Systems with Faults N. F. Tzeng, G.
Lin (University of Southwestern Louisiana)
(R) A Multicast Protocol Based on a Single Logical Ring Using a Virtual
Token and Logical Clocks W. Jia, J. Cao, T. Y. Cheung (City University of
Hong Kong)
(C) Fault-Tolerant Multicast in Hypercube Multicomputers G. M. Chiu, K. S.
Chen (National Taiwan Institute of Technology)
(C) Partition and Task Migration on k-Extra-State Networks X. Shen, Y.
Zhang (University of Missouri-Kansas City)
(R) A Time- and Cost- Optimal Algorithm for Overlap Graphs with
Applications S. Olariu (Old Dominion),
A. Y. Zomaya (Western Australia)
(R) Randomized Parallel Algorithms for the Homing Sequence Problem B.
Ravikumar, X. Xiong (Rhode Island)
(C) Integer Sorting and Routing in Arrays with Reconfigurable Optical Buses
S. Pavel, G. A. Akl (Queen's University, Ontario)
(C) Algorithms for Sorting Arbitrary Input Using a Fixed-Size Parallel
Sorting Devices S. Q. Zheng (Louisiana State)
(R) The Impact of Speeding Up Critical Sections with Data Prefetching and
Forwarding P. Trancoso, J. Torrellas (UIUC)
(R) Synchronization Elimination in the Deposit Model S. Hinrichs (Global
Internet Software)
(R) Prefetching and Caching for Query Scheduling in a Special Class of
Distributed Applications A. Sinha, C. Chase (UT Austin)
(R) Benchmarking Message Passing Performance Using MPI L. T. Liu, D. E.
Culler, C. Yoshikawa (Berkeley)
(R) Design and Implementation of NX Message Passing Using Shrimp Virtual
Memory Mapped Communication
R. Alpert, C. Dubnicki, E. Felten, K. Li (Princeton)
(R) A Priority-Based Flow Control Mechanism to Support Real-time Traffic in
Pipelined Direct Networks
S. Balakrishnan, F. Ozguner (Ohio State)
(R) A Spatial-Temporal Parallel Approach for Real-Time MPEG Video
Compression K. Shen, E. J. Delp (Purdue)
(R) Ray Tracing: Parallelization via Image Decomposition and Performance
Impact B. R. Sklar, A. K. Somani (Washington)
(R) A Parallel Algorithm for Scientific Visualization G. Knittel (U. of
Tubingen, Germany)
(R) Program Analysis for Cache Coherence: Beyond Interprocedural Boundaries
L. Choi (Intel), P. C. Yew (Minnesota)
(R) A Timestamp-based Selective Invalidation Scheme for Multiprocessor
Cache Coherence X. Yuan, R. Melhelm, R. Gupta (Pittsburgh)
(R) Scheduling of Wavefront Parallelism on Scalable Shared-memory
Multiprocessors N. Majikian,
T. S. Abdelrahman (Toronto)
(R) Efficient and Flexible Object Sharing M. Castro, M. Sequeira, M. Costa,
P. Guedes (IST-INESC)
(R) Reducing Cache Invalidation Overheads in Wormhole Routed DSMs Using
Multidestination Message Passing D. Dai, D. K. Panda (Ohio State)
(R) Software-Based Communication Latency Hiding for Commodity Workstation
Networks V. Strumpen (Iowa)
(R) Parallel Processors for Synthetic Aperture Radar Imaging P. G. Meisl,
M. R. Ito, I. G. Cumming (B.C.)
(R) Efficient Algorithms for Estimating Atmospheric Parameters for Surface
Reflectance Retrieval
H. Fallah-Adl, J. Ja'Ja' and S. Liang (Maryland)
(R) Synthesizing Efficient Out-of-Core Programs for Block Recursive
Algorithms using Block-Cyclic Data Distributions Z. Li, J. H. Reif (Duke),
S. K. S. Gupta (Ohio University)
(R) Automatic Self-Allocating Threads (ASAT) on an SGI Challenge C.
Severance, R. Enbody (Michigan State)
(R) A Hydro-Dynamic Approach to Heterogeneous Dynamic Load Balancing in a
Network of Computers
C. C. Hui, S. T. Chanson (Hong Kong University of Science & Technology)
(R) A Load-Balancing Algorithm for N-cubes M. Y. Wu, W. Shu (SUNY Buffalo)
Communications Issues in Parallel Systems
Gianfranco Bilardi, University of Illinois @ Chicago Center
Moving Real-Time Signal and Image Processing Toward Parallel
High-Performance Computers
R. Linderman, Rome Research and Development Center
(R) Reducing Conflicts in Direct-Mapped Caches with a Temporality-Based
Design J. A. Rivers, E. S. Davidson (Michigan)
(R) A Hybrid Cache Coherence Protocol for a Decoupled Multi-channel Optical
Network: SPEED DMON J. H. Ha,T. M. Pinkston (Southern California)
(R) An Efficient Hybrid Cache Coherence Protocol for Shared Memory
Multiprocessors Y. Chang, L. N. Bhuyan (Texas A & M)
(R) FAST: A Low-Complexity Algorithm for Efficient Scheduling of DAGs on
Parallel Processors Y. K. Kwok,I. Ahmad, J. Gu (Hong Kong U. of Science &
Tech.)
(R) 3-D Land Avoidance and Load Balancing in Regional Ocean Simulation L.
DeRose, K. Gallivan (UIUC),
E. Gallopolus (U. of Patras, Greece)
(C) Analysis of Heart Rate Variability on a Massively Parallel Processor S.
M. Bhandarkar, S. Chirravuri, D. Whitmire (Georgia)
(C) Parallel Implementation of Cone Beam Tomography D. A. Reimann, V.
Chaudhary, M. J. Flynn, I. K. Sethi (Wayne State)
(R) Efficient Reliable Multicast on MYRINET K. Verstoep, K. Langendoen, H.
Bal (Vrije University, The Netherlands)
(R) A Flexible Processor Allocation Strategy for Mesh Connected Parallel
Systems V. Gupta, A. Jayendran (SUNY Binghamton)
(R) Task Spreading and Shrinking on a Network of Workstations with Various
Edge Classes J. C. Jacob (Cornell), S. Y. Lee (Auburn)
(R) Construction of Optimal Multicast Trees Based on the Parameterized
Communication Model J. L. Park, H. A. Choi (George Washington), N.
Nupairoj, L. M. Ni (Michigan State)
(R) Minimizing Node Contention in Multiple Multicast on Wormhole k-ary
n-cube Networks R. Kesavan, D. K. Panda (Ohio State)
(R) An Efficient Distributed Mutual Exclusion Algorithm N. Pissinou (USL),
K. Makki (UNLV), E. K. Park, Z. Hu (USNA), W. Wong (DISA)
(R) Improving the I/O Performance of Real-Time Database Systems with
Multiple-Disk Storage Structures A. M. K. Cheng, S. X. Gu
(Houston-University Park)
(R) Implementation and Performance Evaluation of the Parallel Relational
Database Server SDC-II T. Tamura, M. Nakamura, M. Kitsuregawa (University
of Tokyo), Y. Ogawa (Fujitsu)
(R) Performance Study of RAID-5 Disk Arrays with Data and Parity Cache S.
K. Mishra, P. Mohapatra (Iowa State)
(R) Load Balancing for Parallel Loops in Workstation Clusters T. H. Kim, J.
M. Purtillo (Maryland)
(R) Performance Analysis of Task Migration in a Portable Parallel
Environment B. Ramkumar, G. Chillariga (Iowa)
(R) Dynamic Task Scheduling and Allocation for 3D Torus Multicomputer
Systems H. Y. Youn, H. Choo, S. M. Yoo, B. Shirazi (UT Arlington)
(R) Expoiting Instruction Level Parallelism with the DS Architecture Y.
Zhang, G. B. Adams III (Purdue)
(R) PEWs: A Decentralized Dynamic Scheduler for ILP Processing G. A. Kemp,
M. Franklin (Clemson University)
(C) A Fine-Grain Parallel Architecture Based on Barrier Synchronization H.
G. Dietz, R. Hoare, T. Mattox (Purdue)
(C) Minimizing Communication of a Recirculating Bitonic Sorting Network J.
D. Lee, K. E. Batcher (Kent State)
(R) Parallel and Distributed Meldable Priority Queues Based on Binomial
Heaps V. A. Crupi (CNR, Italy), S. K. Das (North Texas), C. M. Pinotti
(CNR, Italy)
(C) A Scalable Cache Design for I-Structures in Multithreaded Architectures
J. L. Gaudiot, C. T. Cheng (Southern California)
(C) An Optimal Routing Policy for Mesh-Connected Topologies J. Wu (Florida
Atlantic)
(C) Designing Processor-cluster Based Systems: Interplay Between Cluster
Organizations and Collective Communication Algorithms D. Basak, D. K. Panda
(Ohio State)
(C) A Framework for Building Distributed Dynamic Applications N. Pissinou,
B. K. Rajashekhar (USL), K. Makki (UNLV), K. Vanapipat (Oracle)
(R) A Novel Algorithm for Buddy-Subcube Compaction in Hypercubes H. L. Chen
(National Taiwan Institute of Technology), S. H. Hu (Jin-Wen, Taiwan)
(R) MpPVM: A Software System for Non-Dedicated Heterogenous Computing K.
Chanchio, X. H. Sun (Louisiana State)
(R) Simulating Message-Driven Programs A. Gursoy, L. V. Kale (UIUC)
TUTORIAL 1
HIGH-PERFORMANCE PARALLEL PROCESSING USING PCS AND LINUX
Instructor: Hank Dietz
Audience: Engineers, programmers, teachers and researchers who are interested using low-cost PC hardware to provide a solid, UNIX-based, parallel computing platform.
Course Description: Commodity PC hardware offers surprisingly good performance at remarkably low cost. Linux is a very complete version of UNIX that is freely available as source code and runs well on a variety of PC platforms. This tutorial will cover a wide range of alternate approaches to using PC hardware and Linux to create high-performance parallel computers. Although the theory behind each of these approaches will be discussed, emphasis will be placed on the practical aspects of implementing and using these parallel systems.
A complete preliminary outline is available online at http://dynamo.ecn.purdue.edu/~hankd/Tutorials/icpp96.html.
Hank Dietz is an associate professor at Purdue University. He received his Ph.D. degree from the Polytechnic Institute of New York. He has been involved in the development of Linux.
Instructors: J. Ramanujam and P. Sadayappan
Audience: Compiler writers for high performance architecture, architects for parallel computers, researchers in high performance computing, graduate students, and application developers.
Course Description: This tutorial will discuss many important issues in the design of high performance compilers. It begins with a review of computer architectures. Then a discussion of the overall compiler structure will follow. Several aspects of dataflow and dependence analysis will be discussed in detail. These will then be used in a detailed coverage of program restructuring techniques used in a wide variety of machines ranging from modern RISC workstations to high-end supercomputers. Specific details of compilation and examples of practical compilers and research projects will also be discussed.
J. Ramanujam is an associate professor at Louisiana State University. He
received an NSF Young Investigator Award in 1994.
P. Sadayappan is an associate professor at The Ohio State University. He
received his Ph.D. degree from SUNY at Stony Brook.
Registration Fee -- Make your check or money order payable to: INTERNATIONAL CONFERENCE ON PARALLEL PROCESSING for the TOTAL amount indicated below and mail it to: Prof. Mike Liu, Dept. of Computer and Information Science, 2015 Neil Ave., The Ohio State University, Columbus, OH 43210-1277.
Please circle appropriate fees below and enter the total:
Conference ONLY* Reg. $360 Student** $200
Workshop ONLY * Reg. $150 Student** $100
Both Conf./Wkshp Reg. $400 Student** $220
Tutorial 1: High-Performance Parallel Processing Using PCs & Linux
Reg. $250 Student** $180
Tutorial 2: High Performance Compilers
Reg. $250 Student** $180
Conference ONLY* Reg. $400 Student** $220
Workshop ONLY * Reg. $170 Student** $120
Both Conf./Wkshp Reg. $450 Student** $250
Tutorial 1: High-Performance Parallel Processing Using PCs & Linux
Reg. $300 Student** $200
Tutorial 2: High Performance Compilers
Reg. $300 Student** $200
Circle appropriate fees and enter the TOTAL here: $ _______________
*The Advance Workshop Registration includes the lunch on August 12, 1996, and the Advance Conference Registration fee includes 3 lunches on August 13, 14, 15, 1996. However, the Late/On-Site Registration fee does not include any lunches. You may purchase extra lunch tickets in advance for your spouse or friends at $15 per lunch per person. Please specify the number of tickets needed and the dates desired below, then add the amount to the total above. Please inform us if you prefer vegetarian meals by checking below.
Extra lunch tickets: $15 x _____days check dates desired: Mon. _____ Tues. ____ Wed. ____ Thurs ______ Check for vegetarian meal_______
**Student registration requires showing ID at the Conference.
Refund Policy: Cancellation of registration must be in writing to: Mike Liu, Dept. of Computer & Information Science, 2015 Neil Avenue, The Ohio State University, Columbus, OH 43210-1277, received by July 29, 1996. No oral/phone cancellations will be accepted.
We do not accept company/government vouchers or credit cards. Foreign checks must be withdrawable from a U.S. Bank.
We reserve the right to cancel a tutorial due to insufficient participation or other unforseeable problems.
Mr. Dr. Prof.
Mrs. Ms. Miss _________________________________________________________
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Affiliation ___________________________________________________________
Address _______________________________________________________________
City, State, Zip _______________________________________________________
Business Phone ___________________________Home Phone ____________________
If you wish to be on our ICPP mailing list please write to: T. Feng 208 Pond Lab, Pennsylvania State Univ., Univ. Park, PA 16802
*ROOM DEPOSIT: One night deposit payable to INDIAN LAKES RESORT, c/o Prof. Mike Liu, Dept. of Computer and Information Science, 2015 Neil Ave., The Ohio State University, Columbus, OH 43210-1277, for guaranteed reservation. Please do not make your room reservation with Indian Lakes Resort directly.Please fill out the form below:
Arrival Date ____________________________Departure Date ___________________ Number of _______________adults __________________children, _____________rooms
The room rates are:
Room for ICPP Regular Attendees 104/up to 2 persons Room for ICPP Student Attendees $70**/up to 2 persons
**Very limited rooms, limited to students only on a first come/first serve basis.
Assignment of rooms will be made according to the date of receipt of the room deposit. REGISTER EARLY TO ASSURE ACCOMMODATIONS. Check in time is 4 P.M.
*Room reservation without Conference/Tutorial Registration will not be accepted.
We must receive two checks, (one payable to the INTERNATIONAL CONFERENCE ON PARALLEL PROCESSING for conference/tutorial registration, the other for a one-night deposit payable to INDIAN LAKES RESORT for room reservation), in order to guarantee both registration and room reservation.
BOTH THE CONFERENCE/TUTORIAL REGISTRATION FORM AND THE ROOM RESERVATION FORM MUST BE RECEIVED BY July 29, 1996.
Send Both checks to: Prof. Mike Liu, Dept. of Computer and Information Science, 2015 Neil Ave., The Ohio State University, Columbus, OH 43210-1277
CHECKS MUST BE RECEIVED WITH REGISTRATION AND RESERVATION FORMS
Registration fees must be paid by check or money order, we regret that we do not accept company/government vouchers or credit cards.
Foreign checks must be in U.S. dollar DRAWN ON A U.S. BANK
Neither phone registration nor registrations without payment will be accepted.
Cancellation of registration must be in writing to: Prof. Mike Liu, Dept. of Computer and Information Science, 2015 Neil Ave., The Ohio State University, Columbus, OH 43210-1277. Cancellation must be received by July 29, 1996. No oral/phone cancellations will be accepted.
Indian Lakes Resort is in Bloomingdale, Illinois (about 15 miles west of the Chicago's O'Hare International Airport). The Resort has a variety of sports facilities including two 18-hole golf courses.
Local transportation between Chicago's O'Hare & Midway Airports to Indian Lakes Resort, 205 Schick Rd., Bloomington, Illinois, 60108, is provided by American Limousine. American Limousine advises that upon arrival you should pick up your luggage and then call 1-800-762-6888. Or, you may call for advanced reservations and information at (708) 920-8888. The one-way fare is $17 for 1 person (15.00 + 2.00 tax) from O'Hare and 20.00 (18.00 + 2.00 tax) from Midway Airport.
The three-volume sets of the 1996 ICPP Proceedings and Workshop Proceedings may be ordered from:
IEEE Computer Society Press 10662 Los Vaqueros Circle P.O. Box 3014 Los Alamitos, CA 90720-1264. Telephone: 1-800-272-6657
Pre-registration is mandatory because the limited space is being reserved for Conference participants only. THE REGISTRATION DEADLINE IS July 29, 1996. Register early to assure your accommodation.
YOU MUST SEND TWO CHECKS:
One for registration for the amount of the conference and/or tutorial, payable to "IInternational Concerence on Parallel Processing." See the registration form. One for a guaranteed room reservation, in the amount of one night deposit per room, payable to "Indian Lakes Resort". Please mail both checks to Prof. Mike Liu, Dept. of Computer and Information Science, 2015 Neil Ave., The Ohio State University, Columbus, OH, 43210-1277.
Both the registration fee and the deposit for guaranteed registration will be refunded only if a written cancellation is received on or before July 29, 1996. (See Important Notice above.)
For additional information on the technical contents of the Workshop, please contact: Dr. H.J. Siegel, (317) 494-3444, School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN 47907-1285. For additional information on the technical contents of the Conference, please contact: Dr. H.C. Torng, (607) 255-5191, School of Electrical Engineering, 1333 Rhodes Hall, Cornell University, Ithaca, NY 14853.
For information regarding accomodations or registration, please contact: Prof. Mike Liu, Dept. of Computer and Information Science, 2015 Neil Ave., The Ohio State University, Columbus, OH, 43210-1277, (614)-292-6552.
Sponsored by International Association for Computers and Communications
The Pennsylvania State University
This page was last modified December 06, 1996. [an error occurred while processing this directive]