Position:
Ph.D. Student
Contact Info:
Address:
Purdue University
School of Electrical and Computer Engineering
Electrical Engineering Building
465 Northwestern Ave.
West Lafayette, Indiana 47907-2035
Phone: (765) 49-63511
Office: Birck 1238
Email: hanil@purdue.edu
Biography:
Education and Experience:
Hanil Lee (S’03) received the M.S. degree in electrical engineering from Pohang University of Science and Technology (POSTECH), Pohang, South Korea, in 1998.
From 1998 to 2003, he was with Samsung Electronics as a Senior Research Engineer and a Manager in the RFIC Design Group, where he worked on the design and development of Frequency Synthesizer ICs, CDMA Baseband Analog Processor ICs and GSM/GPRS/CDMA/WCDMA RF Transceiver ICs.
Since 2003, he has been with the School of Electrical and Computer Engineering, Purdue University, where he is currently working toward the Ph.D. degree in the field of integrated circuits and systems. He holds five U.S. patents in the field of electrical circuits and systems.
Current Research:
RF/Microwave/Analog/Mixed-Signal IC and System Design
- Si/SiGe based and GaAs/GaInP/AlGaAs HBT based RF transceivers and sub-blocks for wireless communications and for optical communications
- Low Noise Amplifiers (LNA), Mixers, VCOs, PLLs, Frequency Synthesizers, Power Amplifiers (PAs) and Transimpedance Amplifiers (TIAs), etc
- Extremely low power RFICs
- Other integrated circuits and systems for other applications
Research Interests:
- High-performance analog/RF/mixed-signal circuits
- systems design
Publications:
Journal Papers:
- “A Δ - Σ Fractional-N Frequency Synthesizer using a wideband integrated VCO and a fast AFC technique for GSM/GPRS/WCDMA Applications,” Han-il Lee, Je-Kwang Cho, Kun-Seok Lee, In-Chul Hwang, Tae-Won Ahn, Kyung-Suc Nah and Byeong-Ha Park, IEEE Journal of Solid-State Circuits, vol. 39, pp. 1164–1169, July. 2004.
- “A fully integrated fractional-N frequency synthesizer with a wideband VCO and a 3-bit 4th order sigma-delta modulator for GSM/GPRS/EDGE applications,” Han-il Lee, Tae-won Ahn, Je-Kwang Cho, Kun-seok Lee, Kyung-suc Nah, and Byeong-ha Park, Journal of the Current Applied Physics, vol. 5, issue 3, pp. 259-264, March 2005.
- “Scheme for No Dead-zone and Fast Phase Frequency Detector Design in PLLs,” Han-il Lee, Tae-won Ahn, and Byeong-ha Park, Journal of the Korean Physical Society, vol. 40, no. 4, pp.543-545, April 2002.
- “Intermediate-Frequency/Baseband Analog Processing Chipset For a CDMA/AMPS Mobile Handset,” Hyunchol Shin, Woo-Seung Choo, Kyung-Suc Nah, Dong-Jin Keum, Jin-Sub Choi, Seung-Beom Baik, Tae-Won Ahn, Han-Il Lee, Il-Young Sohn, Duck-Young Jung, Byeong-Ha Park, Journal of the Korean Physical Society, vol. 39, no. 1, pp.160-164, July 2001.
Conference Papers
- “A 3GHz Subthreshold CMOS Low Noise Amplifier,” Hanil Lee and Saeed Mohammadi, 2006 IEEE RFIC Symposium, pp. 494-497, San Francisco, USA, June, 2006.
- “An Extremely Low Power 2 GHz CMOS LC VCO for Wireless Communication Applications,” Han-il Lee, Tae-young Choi, S. Mohammadi, and L.P.B. Katehi, The European Conference on Wireless Technology, pp. 41–44, Paris, France, Oct., 2005.
- “A Low Phase Noise 10 GHz VCO in 0.18um CMOS Process,” Tae-young Choi, Han-il Lee, L.P.B. Katehi, and S. Mohammadi, European Microwave Conference, vol. 3, pp. 1731–1734, Paris, France, Oct., 2005.
- “A Low Phase Noise 10 GHz VCO in 0.18um CMOS Process,” Tae-young Choi, Han-il Lee, L.P.B. Katehi, and S. Mohammadi, The European Conference on Wireless Technology, pp. 293–296, Paris, France, Oct., 2005.
- “A Σ−∆ Fractional-N Synthesizer with a Fully-Integrated Loop Filter for a GSM/GPRS Direct-Conversion Transceiver,” In-Chul Hwang, Han-il Lee, Kun-Seok Lee, Je-Kwang Cho, Kyung-Suc Nah, and Byeong-Ha Park, 2004 IEEE Symposium on VLSI Circuits Digest, 2004, Honolulu, USA, June, 2004.
- “A GSM/EGSM/DCS/PCS direct conversion receiver with integrated synthesizer,” Young-Jin Kim, Young-Suk Son, Parkhomenko, V.N., In-Chul Hwang, Kyung-Suc Nah, Han-il Lee, Je-Kwang Cho, Sergeev, A., Byeong-Ha Park, 2004 IEEE RFIC Symposium, Fort Worth, Texas, June, 2004.
- “A Δ - Σ Fractional-N Frequency Synthesizer using a wideband integrated VCO and a fast AFC technique for GSM/GPRS/WCDMA Applications,” Han-il Lee, Je-Kwang Cho, Kun-Seok Lee, In-Chul Hwang, Tae-Won Ahn, Kyung-Suc Nah and Byeong-Ha Park, IEEE ESSCIRC Digest, 2003, Portugal, September, 2003.
- “A 2-GHz Wide Band Low Phase Noise Voltage-Controlled Oscillator with On-Chip LC tank,” Je-Kwang Cho, Han-il Lee, Kyung-Suc Nah, and Byeong-Ha Park, IEEE Custom Integrated Circuits System, 2003, San Francisco, USA, October, 2003.
- “Phase Frequency Detectors for Fast Frequency Acquisition in Zero-dead-zone CPPLLs for Mobile Communication Systems," Kun-Seok Lee, Byeong-Ha Park, Han-il Lee, and Min Jong Yoh, IEEE ESSCIRC Digest, 2003, Portugal, September, 2003.
- “A Fully Integrated Fractional-N Frequency Synthesizer with a wideband VCO and a 3-bit 4th order Δ - Σ Modulator for GSM/GPRS/EDGE Applications,” Han-il Lee, Tae-won Ahn, Je-Kwang Cho, Kun-seok Lee, Kyung-suc Nah, and Byeong-ha Park, The 10th Korean Conference on Semiconductors, Seoul, Korea, Feb. 2003.
- “A 2.6 V GSM/PCN Dual Band Variable Gain Low Noise RF Down Conversion Mixer,” Bonkee Kim, Kyung-Suc Nah, Tae-Won Ahn, Han-il Lee, Je-Kwang Cho and Byeong-Ha Park, 2002 IEEE RFIC Symposium, Seattle, Washington, June, 2002.
- “A 2.6 V GSM/PCN DUAL BAND VARIABLE GAIN LOW NOISE RF DOWN CONVERSION MIXER,” Bonkee Kim, Kyung-Suc Nah, Tae-Won Ahn, Han-il Lee, Je-Kwang Cho and Byeong-Ha Park, 2001 SOC design conference, Seoul, Korea, Oct. 2001.
- “IQ Modulator and IQ Demodulator for RF Transceiver IC in GSM and PCN Dual band cellular systems,” Han-il Lee, Kyung-suc Nah, Tae-won Ahn, Bonkee Kim, and Byeong-ha Park, The 8th Korean Conference on Semiconductors, Seoul, Korea, Feb. 2001.
- “An RF Transceiver IC for GSM/DCS1800 Dual Band,” Kyung-suc Nah, Han-il Lee, Bonkee Kim, Tae-won Ahn, and Byeong-ha Park, The 8th Korean Conference on Semiconductors, Seoul, Korea, Feb. 2001.
- “A Scheme for No Dead-zone and Fast Phase Frequency Detector Design in PLLs,” Han-il Lee, Tae-won Ahn, and Byeong-ha Park, The 7th Korean Conference on Semiconductors, Seoul, Korea, Jan. 2000.
- “Intermediate-Frequency/Baseband Analog Processing Chipset for CDMA/AMPS Mobile Handsets,” H. Shin, W. Choo, K. Nah, D. Keum, J. Choi, T. Ahn, I. Son, S. Baek, H. Lee, D. Jung, B. Park, The 7th Korean Conference on Semiconductors, Seoul, Korea, Jan. 2000.
- “A 48-PIN ‘MINICHIP’ IMPLEMENTATION OF BASEBAND ANALOG PROCESSOR FOR THE CDMA MOBILE PHONES,” K. Nah, H. Lee, et al., The First IEEE Asia Pacific Conference on ASICs, pp. 417-420, August 1999.
Patents:
- “Frequency plan and Architecture for GSM/GPRS/WCDMA applications,” Han-il Lee, U.S. Patent pending.
- “Automatic Frequency Calibration Technique,” Han-il Lee, U.S. Patent pending.
- “Carrier Harmonic Suppression Mixers,” Han-il Lee, Hae-Moon Seo, U.S. Patent pending.
- “New On-chip Loop Filter Technique for Fully Integrated PLL applications,” In-chul Hwang, Han-il Lee, U.S. Patent pending.
- “Programmable Frequency Divider with Various Dividing Ratio,” Han-il Lee, Korea Patent No. 10-2002-0077294, 12-06-2002.
- “Phase-locked loop for reducing frequency lock time,” Han-il Lee, U.S. Patent No. US034891, 12-20-2001.
- “Frequency Comparator with Programmable Frequency Accuracy,” Han-il Lee, Korea Patent No. 10-2001-0088819, 12-31-2001.
- “Voltage Controlled Oscillator with Wide Control Voltage Tuning Range,” Han-il Lee, Korea Patent No. 10-2001-0061895, 10-08-2001.
- “A SCHEME FOR FAST FREQUENCY LOCK IN PLL TYPE FREQUENCY SYNTHESIZER,” Han-il Lee, Korea Patent No. 10-2001-0030526, 05-31-2001.
- “A Useful Method For Fast Frequency Lock in PLL Based Frequency Synthesizer,” Han-il Lee, Korea Patent No. 10-2001-0007273, 02-14-2001.
- “Phase Locked Loops,” Han-il Lee, Korea Patent No. 10-1999-0002249, 01-25-1999.
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