Project Goals

The ever-increasing number of on-chip transistors are resulting in power consumption at unprecedented levels especially in embedded applications. High power consumption levels both reduce battery life and increase packaging cost in portable and wireless systems. ICALP integrates circuit-level power management mechanisms with architecture/compiler-level mechanisms and policies to reduce power consumption. We propose novel architectural techniques to dynamically reconfigure and tailor hardware structures to fit an application's requirements. We propose a novel circuit-level mechanism, called gated-V_dd, to turn off the supply voltage to the unused sections of the chip. By dynamically reconfiguring hardware, and only providing supply voltage to active circuits, an ICALP architecture reduces the system's power consumption.