- Dan Jiao
Dan Jiao received her Ph.D. degree in Electrical Engineering from the University of Illinois at Urbana-Champaign in October 2001. She then worked at Technology CAD Division at the Intel Corporation until September 2005 as Senior CAD Engineer, Staff Engineer (very early promotion), and Senior Staff Engineer (very early promotion). In September 2005, she joined Purdue University as an Assistant Professor in the School of Electrical and Computer Engineering. In 2009, she was promoted to Associate Professor with tenure. She has authored two book chapters and over 90 papers in refereed journals and international conferences. She is responsible for a number of innovative algorithms in high-frequency VLSI CAD, most significant of which is her invention of circuit-print projection translation method as an industry-first full-wave solution for full-chip analysis. She holds four invention disclosures, two of which became trade secrets, and two of which were submitted for US and Europe patent application (one awarded in 2007, U.S. patent No. 7,289,945). Many of her developments have been acknowledged as BKM (Best Known Method) CAD tools across Intel. Her current research interests include computational electromagnetics, modeling of micro- and nano-scale circuits, high frequency VLSI circuit design and analysis, high-performance VLSI CAD, applied electromagnetics, fast and high-capacity numerical methods, scattering and antenna analysis, and bio-electromagnetics.
Dr. Jiao received NSF CAREER Award in 2008. She was a 2006 DARPA Young Faculty Award finalist (one of the 50 selected throughout the country). She received an ONR award through Young Investigator and Long Range Program. She received the 2006 Jack and Cathie Kozik Faculty Start-up Award bestowed by the School of Electrical and Computer Engineering at Purdue University. She has been nominated by President of Purdue University for Packard Fellowships for Science and Engineering. She received Best Paper Award from 2004 Intel annual corporate-wide technology conference, Design and Test Technology Conference (DTTC), for her work on generic broadband model of high-speed circuits. In 2003, she won Intel Logic Technology Development (LTD) Divisional Achievement Award in recognition of her excellent work on the industry-leading BroadSpice modeling/simulation capability for designing high-speed microprocessors, packages, and circuit boards. She was also awarded the Intel Technology CAD (TCAD) Divisional Achievement Award for the development of innovative full-wave solvers for high frequency IC design. Her paper, A Novel Technique for Full-wave Modeling of Large-Scale Three-Dimensional High-Speed On/Off-chip Interconnect Structures, was ranked No. 1 among all the papers submitted to 2003 International Conference on Simulation of Semiconductor Processes and Devices. In 2002, she was bestowed upon by Intel Components Research the prestigious Intel Hero Award (Intel-wide she was the tenth recipient) for the timely and accurate two- and three- dimensional full-wave simulations. She also won Intel LTD Team Quality Award for her outstanding contribution to the development of the measurement capability and simulation tools for high frequency on-chip cross-talk. She was the winner of the 2000 Raj Mittra Outstanding Research Award, bestowed upon her by the University of Illinois at Urbana-Champaign, which was awarded to the best graduate student researcher in the electromagnetics area. She is a senior member of the IEEE.